Quantum mechanical tunneling across an insulating barrier is the basis for the operation of magnetic tunnel junctions and other novel memories. However, current memory designs are hampered by poor resistance switching ratios and high power consumption. This problem could potentially be overcome by use of a ferroelectric tunnel barrier material which promises high OFF/ON resistance ratios with lower power consumption. Meeting this challenge, an international research group has recently described the design of a ferroelectric tunnel junction with exceptional tunneling electroresistance that may compete with traditional nonvolatile memories. A. Chanthbouala of the Unité Mixte de Physique CNRS/Thales, S. Fusil of CNRS and the Université d’Evry-Val d’Essonne, X. Moya of the University of Cambridge, S. Xavier of Thales Research and Technology, A. Moshar of Asylum Research in Santa Barbara, and their colleagues have reported their findings in the December 4, 2011 online edition of Nature Nanotechnology (DOI: 10.1038/NNANO.2011.213).
The researchers first deposited a 2 nm BaTiO3/30 nm La0.67Sr0.33MnO3 bilayer onto a (001)-oriented NdGaO3 substrate using pulsed laser deposition. They then patterned an array of 10 nm Au/10 Co top contacts onto the bilayer. These contacts were then probed using a conductive atomic force microscope tip to measure the piezoresponse and electroresistance of each junction. A hysteretic behavior in the junction resistance was observed, which is consistent with ferroelectric polarization switching of the BaTiO3 layer, and the tunnel resistance of the junction was shown to strongly depend on the write voltage, as shown in the figure. The magnitude of the OFF/ON ratio was also observed to change by over two orders of magnitude, which corresponds to a nearly 10,000% increase in junction resistance. This is a significant improvement over conventional tunneling magnetoresistive memories, which typically show only a fourfold OFF/ON ratio.
The researchers next measured the switching stability of over 50 junctions, and recorded an average switching ratio of 64 with little variation in I-V behavior over 900 read/write cycles. The power consumption of these devices (~10 fJ/bit) is also lower than that of other nonvolatile memory technologies, making these junctions appealing for a wide range of memory applications.
The research team believes that these devices can be optimized using strain engineering, electrical boundary conditions, and even magnetic electrodes to achieve further improvements in performance and could potentially compete with other nonvolatile memory technologies.